View 74LVT162373_19751.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

INTEGRATED CIRCUITS
74LVT162373 3.3 V LVT 16-bit transparent D-type latch with 30 termination resistors (3-State)
Product specification IC23 Data Handbook 1999 Sep 23
Philips Semiconductors
Philips Semiconductors
Product specification
3.3 V LVT 16-bit transparent D-type latch with 30 termination resistors (3-State)
74LVT162373
FEATURES
* 16-bit transparent latch * 3-State buffers * Output capability: +12 mA / -12 mA * TTL input and output switching levels * Input and output interface capability to systems at 5 V supply * Bus-hold data inputs eliminate the need for external pull-up * Live insertion/extraction permitted * Outputs include series resistance of 30 making external * Power-up reset * Power-up 3-State * No bus current loading when output is tied to 5 V bus * Latch-up protection exceeds 500 mA per JEDEC Std 17 * ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model resistors unnecessary resistors to hold unused inputs
DESCRIPTION
The 74LVT162373 is a high-performance BiCMOS product designed for VCC operation at 3.3 V. This device is a 16-bit transparent D-type latch with non-inverting 3-State bus compatible outputs. The device can be used as two 8-bit latches or one 16-bit latch. When Latch Enable (LE) input is High, the Q outputs follow the data (D) inputs. When Latch Enable is taken Low, the Q outputs are latched at the levels of the D inputs one setup time prior to the High-to-Low transition. The 74LVT162373 is designed with 30 series resistance in both the High and Low states of the output. This design reduces the noise in applications such as memory address drivers, clock drivers, and bus receivers/transmitters.
QUICK REFERENCE DATA
SYMBOL tPLH tPHL CIN COUT ICCZ PARAMETER Propagation delay nDx to nQx Input capacitance Output capacitance Total supply current CL = 50 pF; VCC = 3.3 V VI = 0 V or 3.0 V Outputs disabled; VO = 0 V or 3.0 V Outputs disabled; VCC = 3.6 V CONDITIONS Tamb = 25 C TYPICAL 3.0 3 9 70 UNIT ns pF pF A
ORDERING INFORMATION
PACKAGES 48-Pin Plastic SSOP Type III 48-Pin Plastic TSSOP Type II TEMPERATURE RANGE -40 C to +85 C -40 C to +85 C ORDERING CODE 74LVT162373 DL 74LVT162373 DGG DWG NUMBER SOT370-1 SOT362-1
1999 Sep 23
2
853-2172 22406
Philips Semiconductors
Product specification
3.3 V LVT 16-bit transparent D-type latch with 30 termination resistors (3-State)
74LVT162373
PIN CONFIGURATION
1OE 1Q0 1Q1 GND 1Q2 1Q3 VCC 1Q4 1Q5 GND 1Q6 1Q7 2Q0 2Q1 GND 2Q2 2Q3 VCC 2Q4 2Q5 GND 2Q6 2Q7 2OE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1LE 1D0 1D1 GND 1D2 1D3 VCC 1D4 1D5 GND 1D6 1D7 2D0 2D1 GND 2D2 2D3 VCC 2D4 2D5 GND 2D6 2D7 2LE
LOGIC SYMBOL
47 46 44 43 41 40 38 37
1D0 1D1 1D2 1D3 1D4 1D5 1D6 1D7 48 1 1LE 1OE 1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7
2 36
3 35
5 33
6 32
8 30
9 29
11 27
12 26
2D0 2D21 2D2 2D3 2D4 2D5 2D6 2D7 25 24 2LE 2OE 2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7
13
14
16
17
19
20
22
23
SA00044
LOGIC SYMBOL (IEEE/IEC)
1OE 1LE 2OE 2LE 1 48 24 25 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 4D 2 1EN C3 2EN C4 1 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23
SA00043
PIN DESCRIPTION
PIN NUMBER 47, 46, 44, 43, 41, 40, 38, 37, 36, 35, 33, 32, 30, 29, 27, 26 2, 3, 5, 6, 8, 9, 11, 12, 13, 14, 16, 17, 19, 20, 22, 23 1, 24 48, 25 4, 10, 15, 21, 28, 34, 39, 45 7, 18, 31, 42 SYMBOL 1D0 - 1D7 2D0 - 2D7 1Q0 - 1Q7 2Q0 - 2Q7 1OE, 2OE 1LE, 2LE GND VCC FUNCTION Data inputs
1D1 1D2 1D3 1D4 1D5 1D6
3D
1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7 1Q8 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7 2Q8
Data outputs Output Enable inputs (active-Low) Latch Enable inputs (active-High) Ground (0V) Positive supply voltage
1D7 1D8 2D1 2D2 2D3 2D4 2D5 2D6 2D7 2D8
SW00010
1999 Sep 23
3
Philips Semiconductors
Product specification
3.3 V LVT 16-bit transparent D-type latch with 30 termination resistors (3-State)
74LVT162373
LOGIC DIAGRAM
nD0 nD1 nD2 nD3 nD4 nD5 nD6 nD7
D
D
D
D
D
D
D
D
E
Q
E
Q
E
Q
E
Q
E
Q
E
Q
E
Q
E
Q
nLE
nOE nQ0 nQ1 nQ2 nQ3 nQ4 nQ5 nQ6 nQ7
SA00046
FUNCTION TABLE
INPUTS nOE L L L L L H H H= h= L= l= NC= X= Z= = nLE H H L L H nDx L H l h X X nDx INTERNAL REGISTER L H L H NC NC nDx OUTPUTS OPERATING MODE nQ0 - nQ7 L H L H NC Z Z Enable and read register Latch and read register Hold Disable outputs
High voltage level High voltage level one set-up time prior to the High-to-Low E transition Low voltage level Low voltage level one set-up time prior to the High-to-Low E transition No change Don't care High impedance "off " state High-to-Low LE transition
SCHEMATIC OF EACH OUTPUT
VCC
27 OUTPUT 27
SW00503
1999 Sep 23
4
Philips Semiconductors
Product specification
3.3 V LVT 16-bit transparent D-type latch with 30 termination resistors (3-State)
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL VCC IIK VI IOK VOUT IO OUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 VO < 0 Output in Off or High state Output in Low state DC output current Output in High state Storage temperature range VI < 0 CONDITIONS
74LVT162373
RATING -0.5 to +4.6 -50 -0.5 to +7.0 -50 -0.5 to +7.0 128
UNIT V mA V mA V mA
DC output diode current DC output voltage3
-64 -65 to +150 C
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS SYMBOL VCC VI VIH VIL IOH IOL t/v Tamb DC supply voltage Input voltage High-level input voltage Input voltage High-level output current Low-level output current Input transition rise or fall rate; Outputs enabled Operating free-air temperature range -40 PARAMETER MIN 2.7 0 2.0 0.8 -12 12 10 +85 MAX 3.6 5.5 V V V V mA mA ns/V C UNIT
1999 Sep 23
5
Philips Semiconductors
Product specification
3.3 V LVT 16-bit transparent D-type latch with 30 termination resistors (3-State)
74LVT162373
DC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40C to +85C MIN VIK VOH VOL VRST Input clamp voltage High-level output voltage Low-level output voltage Power-up output Low voltage5 VCC = 2.7V; IIK = -18mA VCC = 3.0V; IOH = -12mA VCC = 3.0V; IOL = 16mA VCC = 3.6V; IO = 1mA; VI = GND or VCC VCC = 3.6V; VI = VCC or GND II Input leakage current VCC = 0 or 3.6V; VI = 5.5V VCC = 3.6V; VI = VCC VCC = 3.6V; VI = 0 IOFF Output off current VCC = 0V; VI or VO = 0 to 4.5V VCC = 3V; VI = 0.8V IHOLD Bus Hold current D inputs7 VCC = 3V; VI = 2.0V VCC = 0V to 3.6V; VCC = 3.6V IEX IPU/PD IOZH IOZL ICCH ICCL ICCZ ICC Additional supply current per input pin2 Quiescent supply current Current into an output in the High state when VO > VCC Power up/down 3-State output current3 3-State output High current 3-State output Low current VO = 5.5V; VCC = 3.0V VCC 1.2V; VO = 0.5V to VCC; VI = GND or VCC; OE/OE = Don't care VCC = 3.6V; VO = 3.0V; VI = VIH or VIL VCC = 3.6V; VO = 0.5V; VI = VIH or VIL VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Disabled; VI = GND or VCC, IO = VCC = 3V to 3.6V; One input at VCC-0.6V, Other inputs at VCC or GND 06 75 -75 500 50 1 0.5 0.5 0.07 4.0 0.07 0.1 125 100 5 -5 0.12 6 0.12 0.2 mA mA A A A Data pins4 Control pins 0.1 0.1 0.4 0.1 -0.4 0.1 135 -135 A 2.0 0.8 0.55 1 10 1 -5 100 A A V V TYP1 -0.85 MAX -1.2 V UNIT
NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25C. 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND. 3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V 0.3V a transition time of 100sec is permitted. This parameter is valid for Tamb = 25C only. 4. Unused pins at VCC or GND. 5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. 6. ICCZ is measured with outputs pulled to VCC or GND. 7. This is the bus hold overdrive current required to force the input to the opposite logic state.
1999 Sep 23
6
Philips Semiconductors
Product specification
3.3 V LVT 16-bit transparent D-type latch with 30 termination resistors (3-State)
74LVT162373
AC CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500; Tamb = -40C to +85C. LIMITS SYMBOL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ PARAMETER Propagation delay nDx to nQx Propagation delay nLE to nQx Output enable time to High and Low level Output disable time from High and Low Level WAVEFORM MIN 2 1 4 5 4 5 0.5 0.5 0.5 0.5 0.1 0.1 0.1 0.1 VCC = 3.3V 0.3V TYP1 2.5 2.5 3.0 3.0 3.5 3.2 3.5 3.2 MAX 4.6 4.0 5.1 4.6 5.4 4.9 5.4 5.1 VCC = 2.7V MAX 5.1 4.3 5.8 4.3 6.6 5.5 5.7 5.0 ns ns ns ns UNIT
NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25C.
AC SETUP REQUIREMENTS
GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500; Tamb = -40C to +85C. LIMITS SYMBOL tS(H) tS(L) th(H) th(L) tW(H) Setup time nDx to nLE Hold time nDx to nLE nLE pulse width High PARAMETER WAVEFORM VCC = 3.3V 0.3V MIN 3 3 1 1.5 2.0 1.0 1.5 1.5 TYP 0.1 0.2 0 0 0.5 VCC = 2.7V MIN 1.0 2.0 1.0 2.0 1.5 ns ns ns UNIT
AC WAVEFORMS
For all waveforms, VM = 1.5V.
2.7V 2.7V
nDx
nLE
VM tw(H) tPHL
VM
VM 0V tPLH VOH
nLE
nQx
VM
VM VOL NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance.
SW00011
Waveform 1. Propagation Delay, Latch Enable to Output, and Latch Enable Pulse Width
2.7V
nDx
VM tPLH
VM 0V tPHL VOH
nQx
VM
VM VOL
SW00012
Waveform 2. Propagation Delay for Data to Outputs
Waveform 4. 3-State Output Enable time to High Level and Output Disable Time from High Level
1999 Sep 23
7
EEEEEEEEEE EEE E EEEEEEEEEE EEE E EEEEEEEEEE EEE E
VM VM VM VM 0V ts(H) th(H) ts(L) th(L) VM VM 0V
2.7V
SW00013
Waveform 3. Data Setup and Hold Times
2.7V
nOE
VM tPZH
VM 0V tPHZ VOH VOH -0.3V 0V
nQx
VM
SW00014
Philips Semiconductors
Product specification
3.3 V LVT 16-bit transparent D-type latch with 30 termination resistors (3-State)
74LVT162373
2.7V
nOE
VM tPZL
VM 0V tPLZ 3V
nQx
VM
VOL +0.3V VOL
SW00015
Waveform 5. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level
TEST CIRCUIT AND WAVEFORMS
6V VCC OPEN VIN PULSE GENERATOR RT D.U.T. CL RL POSITIVE PULSE 10% tW VOUT RL GND 90% NEGATIVE PULSE VM 10% tTHL (tF) tTLH (tR) 90% 90% VM 10% 0V 10% 0V tTLH (tR) tTHL (tF) AMP (V) tW VM 90% AMP (V)
Test Circuit for 3-State Outputs
VM
SWITCH POSITION
TEST tPHZ/tPZH tPLZ/tPZL tPLH/tPHL SWITCH GND 6V open
VM = 1.5V Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
INPUT PULSE REQUIREMENTS FAMILY Amplitude 74LVT16 2.7V Rep. Rate 10MHz tW 500ns tR 2.5ns tF 2.5ns
SW00003
1999 Sep 23
8
Philips Semiconductors
Product specification
3.3 V LVT 16-bit transparent D-type latch with 30 termination resistors (3-State)
74LVT162373
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm
SOT370-1
1999 Sep 23
9
Philips Semiconductors
Product specification
3.3 V LVT 16-bit transparent D-type latch with 30 termination resistors (3-State)
74LVT162373
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1mm
SOT362-1
1999 Sep 23
10
Philips Semiconductors
Product specification
3.3 V LVT 16-bit transparent D-type latch with 30 termination resistors (3-State)
74LVT162373
NOTES
1999 Sep 23
11
Philips Semiconductors
Product specification
3.3 V LVT 16-bit transparent D-type latch with 30 termination resistors (3-State)
74LVT162373
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1999 All rights reserved. Printed in U.S.A. Date of release: 09-99 Document order number: 9397 750 06507
Philips Semiconductors
1999 Sep 23 12

▲Up To Search▲

Price & Availability of 74LVT162373

	To Download 74LVT162373 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .